| Process Capability |
| Technology Item |
Current Process Capability |
On-going Development |
| Layer Count |
2~12 Layers |
14~20 Layers |
| Min. Finished Hole Size |
0.2 mm |
0.15 mm |
| Max. Aspect Ratio |
6 : 1 |
8 : 1 |
| Min. Board Thickness (Final) |
0.45 mm |
0.30 mm |
| Max. Board Thickness (Final) |
2.0 mm |
3.0 mm |
| Min. Core Thickness |
0.05 mm (Exclude Copper) |
0.05 mm (Exclude Copper) |
| Min. Copper Thickness |
0.5 oz |
0.33 oz |
| Max. Copper Thickness |
3 oz |
5 oz |
| Min. Internal Layer Trace/Space |
0.075 / 0.075 mm(3/3 mil) |
0.063 / 0.063 mm (2.5/2.5 mil) |
| Min Outer Layer Trace/Space |
0.075 / 0.075 mm(4/4 mil) |
0.063 / 0.063 mm (2.5/2.5 mil) |
| Min SMD Size |
0.2 mm (8 mil) |
0.15 mm (6 mil) |
| Min. SMD Pitch |
0.4 mm (16 mil) |
0.35 mm (14 mil) |
| Hole Registration Tolerance |
0.1 mm |
0.075 mm |
| Image Registration Tolerance |
0.037 mm |
0.037 mm |
| Solder Mask Registration Tolerance |
0.037 mm |
0.037 mm |
| Min. Solder Dam |
3 mil (0.075 mm) |
2 mil (0.05 mm) |
| Impedance Control |
10% |
8% |
| Blind Hole and Bury Hole |
No |
Yes |
| PCB Warp and Twist |
0.50% |
0.50% |